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CS5467
15. REVISION HISTORY
Revision
PP1
PP2
F1
F2
F3
Date
FEB 2007
FEB 2007
MAR 2007
JAN 2010
APR 2011
Changes
Initial release.
Corrections to implicitly state that temperature measurement is a secondary func-
tion of voltage2 channel. Updated typical connection diagram. Changed Phase
Compensation Range from ±2.8° to ±5.4°.
Updated to F1 for quality process level (QPL).
Increased on-chip reference temperature coefficient from 25 ppm / °C typ. to
40 ppm / °C typ.
Removed lead-containing (Pb) device ordering information.
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available.
Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
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for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
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copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives con-
sent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
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